The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade

Cadeddu S.;Casu L.;Brundu D.
;Cardini A.;Lai A.;Loi A.;
2019-01-01

Abstract

The nSYNC chip is a radiation tolerant custom ASIC, developed in UMC 130 nm technology, and the main component of the new readout electronics for the LHCb Muon Detector Upgrade. The nSYNC has been developed in order to implement all the required functionalities for the readout upgrade in terms of timing alignment and measurements, and equipped also with control and monitoring features. The internal architecture of the chip, the data flow and test results on different nSYNC functionalities are presented.
2019
Inglese
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
Elsevier
936
378
379
2
WOS:000471828100144
2-s2.0-85056641037
Frontier Detectors for Frontier Physics: 14th Pisa Meeting on Advanced Detectors
Esperti anonimi
27 Maggio 2018 - 2 Giugno 2018
Isola d'Elba, Italia
scientifica
Large hadron collider; Radiation-hard electronics; Readout electronics; Time measurement
no
4 Contributo in Atti di Convegno (Proceeding)::4.1 Contributo in Atti di convegno
Cadeddu, S.; Casu, L.; Brundu, D.; Cardini, A.; Lai, A.; Loi, A.; Albicocco, P.; Balla, A.; Carletti, M.; Ciambrone, P.; Gatta, M.
273
11
4.1 Contributo in Atti di convegno
reserved
info:eu-repo/semantics/conferencePaper
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