Power-awarness in coarse-grained reconfigurable designs: A dataflow based strategy

PALUMBO, FRANCESCA;SAU, CARLO;RAFFO, LUIGI
2014-01-01

Abstract

Applications and hardware complexity management in modern systems tend to collide with efficient resource and power balance. Therefore, dedicated and power-aware design frameworks are necessary to implement efficient multi-functional runtime reconfigurable signal processing platforms. In this work, we adopt dataflow specifications as a starting point to challenge power minimization.
2014
Inglese
Proceedings of the 2014 IEEE International Workshop on Signal Processing Systems
IEEE
1
6
6
WOS:000783548100052
2-s2.0-84920276832
2014 IEEE International Workshop on Signal Processing Systems
contributo
Esperti anonimi
20-22 October 2014
Belfast (Regno Unito)
internazionale
scientifica
no
4 Contributo in Atti di Convegno (Proceeding)::4.1 Contributo in Atti di convegno
Palumbo, Francesca; Sau, Carlo; Raffo, Luigi
273
3
4.1 Contributo in Atti di convegno
reserved
info:eu-repo/semantics/conferencePaper
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