Meloni Paolo
UniCa Ateneo Docenti e ricercatori Paolo Meloni Ricerca Prodotti della Ricerca (IRIS)

Paolo Meloni

Mostrati risultati da 1 a 50 di 78
Titolo Data di pubblicazione Autore(i) Rivista Editore
A Tiny Transformer for Low-Power Arrhythmia Classification on Microcontrollers 1-gen-2024 Busia, Paola; Scrugli, Matteo Antonio; Jung, Victor Jean-Baptiste; Benini, Luca; Meloni, Paolo IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS -
Reducing False Alarms in Wearable Seizure Detection with EEGformer: A Compact Transformer Model for MCUs 1-gen-2024 Busia, Paola; Cossettini, Andrea; Ingolfsson, Thorir M.; Benatti, Simone; Burrello, Alessio; Jung, Victor J. B.; Scherer, Moritz; Scrugli, Matteo A.; Bernini, Adriano; Ducouret, Pauline; Ryvlin, Philippe; Meloni, Paolo; Benini, Luca IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS -
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators 1-gen-2023 Ratto, F.; Mainez, A. P.; Sau, C.; Meloni, P.; Deriu, G.; Delucchi, S.; Massa, M.; Raffo, L.; Palumbo, F. JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY -
On-FPGA Spiking Neural Networks for End-to-End Neural Decoding 1-gen-2023 Leone, G; Raffo, L; Meloni, P IEEE ACCESS -
EEGformer: Transformer-Based Epilepsy Detection on Raw EEG Traces for Low-Channel-Count Wearable Continuous Monitoring Devices 1-gen-2022 Busia, Paola; Cossettini, Andrea; Ingolfsson, Thorir Mar; Benatti, Simone; Burrello, Alessio; Scherer, Moritz; Scrugli, Matteo Antonio; Meloni, Paolo; Benini, Luca - -
An Adaptive Cognitive Sensor Node for ECG Monitoring in the Internet of Medical Things 1-gen-2022 Scrugli, M. A.; Loi, D.; Raffo, L.; Meloni, P. IEEE ACCESS -
A Bandwidth-Efficient Emulator of Biologically-Relevant Spiking Neural Networks on FPGA 1-gen-2022 Leone, G; Raffo, L; Meloni, P IEEE ACCESS -
An Adaptable Cognitive Microcontroller Node for Fitness Activity Recognition 1-gen-2022 Scrugli, M. A.; Blazica, B.; Meloni, P. - Springer
Integration of Energy Storage Systems within Modular Multilevel Converters for Medium-Voltage Distribution Networks 1-gen-2022 Meloni, Paolo; Serpi, Alessandro - -
Target-Aware Neural Architecture Search and Deployment for Keyword Spotting 1-gen-2022 Busia, P.; Deriu, G.; Rinelli, L.; Chesta, C.; Raffo, L.; Meloni, P. IEEE ACCESS -
Dynamic Pruning for Parsimonious CNN Inference on Embedded Systems 1-gen-2022 Busia, P.; Theodorakopoulos, I.; Pothos, V.; Fragoulis, N.; Meloni, P. - -
ALOHA: A Unified Platform-Aware Evaluation Method for CNNs Execution on Heterogeneous Systems at the Edge 1-gen-2021 Busia, Paola; Minakova, Svetlana; Stefanov, Todor; Raffo, Luigi; Meloni, Paolo IEEE ACCESS -
Runtime adaptive iomt node on multi-core processor platform 1-gen-2021 Scrugli, M. A.; Meloni, P.; Sau, C.; Raffo, L. ELECTRONICS -
Task-Specific Automation in Deep Learning Processes 1-gen-2021 Buchgeher, G.; Czech, G.; Ribeiro, A. S.; Kloihofer, W.; Meloni, P.; Busia, P.; Deriu, G.; Pintor, M.; Biggio, B.; Chesta, C.; Rinelli, L.; Solans, D.; Portela, M. - Springer Science and Business Media Deutschland GmbH
Exploring NEURAghe: A Customizable Template for APSoC-Based CNN Inference at the Edge 1-gen-2020 Meloni, P.; Loi, D.; Deriu, G.; Carreras, M.; Conti, F.; Capotondi, A.; Rossi, D. IEEE EMBEDDED SYSTEMS LETTERS -
ZyON: Enabling Spike Sorting on APSoC-Based Signal Processors for High-Density Microelectrode Arrays 1-gen-2020 Leone, G.; Raffo, L.; Meloni, P. IEEE ACCESS -
Optimizing Temporal Convolutional Network Inference on FPGA-Based Accelerators 1-gen-2020 Carreras, M.; Deriu, G.; Raffo, L.; Benini, L.; Meloni, P. IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS -
Runtime-adaptive cognitive IoT nodes 1-gen-2019 Scrugli, M. A.; Loi, D.; Raffo, L.; Meloni, P. - CEUR-WS
Sustainable water management in quality wine-making 1-gen-2019 Soccol, M.; Perra, A.; Loddo, S.; Meloni, P.; Barbaro, M.; Cascio, M. L.; Sirca, C. - Institute of Electrical and Electronics Engineers Inc.
Optimization and deployment of CNNs at the Edge: The ALOHA experience 1-gen-2019 Meloni, P.; Loi, D.; Busia, P.; Deriu, G.; Pimentel, A. D.; Sapra, D.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Pintor, M.; Biggio, B.; Moser, B.; Shepelev, N.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. - Association for Computing Machinery, Inc
Flexible acceleration of convolutions on FPGAs: Planning NEURAghe 2.0 1-gen-2019 Carreras, M.; Deriu, G.; Meloni, P. - CEUR-WS
ALOHA: An architectural-aware framework for deep learning at the edge 1-gen-2018 Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, Maura; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. - Association for Computing Machinery
Exploiting All Programmable SoCs in Neural Signal Analysis: A Closed-Loop Control for Large-Scale CMOS Multielectrode Arrays 1-gen-2018 Seu, Giovanni Pietro; Angotzi, Gian Nicola; Boi, Fabio; Raffo, Luigi; Berdondini, Luca; Meloni, Paolo IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS -
Neuraghe: exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs 1-gen-2018 Meloni, Paolo; Capotondi, Alessandro; Deriu, Gianfranco; Brian, Michele; Conti, Francesco; Rossi, Davide; Raffo, Luigi; Benini, Luca ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS -
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project 1-gen-2018 Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintor, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I. - Institute of Electrical and Electronics Engineers Inc.
An FPGA platform for real-time simulation of spiking neuronal networks 1-gen-2017 Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi FRONTIERS IN NEUROSCIENCE -
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs 1-gen-2017 Meloni, P.; Rubattu, C.; Tuveri, G.; Pani, D.; Raffo, L.; Palumbo, F. JOURNAL OF SYSTEMS ARCHITECTURE -
On-FPGA real-time processing of biological signals from high-density MEAs: A design space exploration 1-gen-2017 Seu, Giovanni Pietro; Angotzi, Gian Nicola; Tuveri, Giuseppe; Raffo, Luigi; Berdondini, Luca; Maccione, Alessandro; Meloni, Paolo - Institute of Electrical and Electronics Engineers Inc.
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 1-gen-2017 Sau, Carlo; Palumbo, Francesca; Pelcat, M; Heulot, J; Nogues, E; Menard, D; Meloni, Paolo; Raffo, Luigi IEEE EMBEDDED SYSTEMS LETTERS -
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy 1-gen-2017 Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY -
Power and clock gating modelling in coarse grained reconfigurable systems 1-gen-2016 Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca - ACM
A high-efficiency runtime reconfigurable IP for CNN acceleration on a mid-range all-programmable SoC 1-gen-2016 Meloni, Paolo; Deriu, Gianfranco; Conti, Francesco; Loi, Igor; Raffo, Luigi; Benini, Luca - Institute of Electrical and Electronics Engineers
Automated Design Flow for Multi-Functional Dataflow-Based Platforms 1-gen-2016 Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca; Bezati, E; Casale Brunet, S; Mattavelli, M. JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY -
Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC 1-gen-2016 Palumbo, Francesca; Sau, Carlo; Evangelista, Davide; Meloni, Paolo; Pelcat, Maxime; Raffo, Luigi - Elsevier B.V.
On-the-fly adaptivity for process networks over shared-memory platforms 1-gen-2016 Tuveri, Giuseppe; Meloni, Paolo; Palumbo, Francesca; Pietro Seu, Giovanni; Loi, Igor; Conti, Francesco; Raffo, Luigi MICROPROCESSORS AND MICROSYSTEMS -
SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract 1-gen-2016 Palumbo, Francesca; Sau, Carlo; Fanni, Tiziana; Meloni, Paolo; Raffo, Luigi - Institute of Electrical and Electronics Engineers Inc.
Curbing the roofline: A scalable and flexible architecture for CNNs on FPGA 1-gen-2016 Meloni, Paolo; Deriu, Gianfranco; Conti, Francesco; Loi, Igor; Raffo, Luigi; Benini, Luca - Association for Computing Machinery, Inc
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation 1-gen-2016 Meloni, Paolo; Palumbo, Francesca; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi MICROPROCESSORS AND MICROSYSTEMS -
Demo: Reconfigurable Platform Composer Tool 1-gen-2016 Sau, C.; Fanni, T.; Meloni, P.; Raffo, L.; Pelcat, M.; Palumbo, F. - IEEE Computer Society
Real-time neural signals decoding onto off-the-shelf DSP processors for neuroprosthetic applications 1-gen-2016 Pani, Danilo; Barabino, Gianluca; Citi, Luca; Meloni, Paolo; Raspopovic, Stanisa; Micera, Silvestro; Raffo, Luigi IEEE TRANSACTIONS ON NEURAL SYSTEMS AND REHABILITATION ENGINEERING -
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures 1-gen-2016 Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING -
Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain 1-gen-2016 Sau, Carlo; Fanni, L; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca - IEEE
Power modelling for saving strategies in coarse grained reconfigurable systems 1-gen-2015 Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca - IEEE (Institute of Electrical and Electronics Engineers)
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding 1-gen-2015 Meloni, Paolo; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi; Palumbo, Francesca - IEEE, Institute of Electrical and Electronics Engineers
A custom MPSoC architecture with integrated power management for real-time neural signal decoding 1-gen-2014 Carta, N; Meloni, Paolo; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS -
Online process transformation for polyhedral process networks in shared-memory MPSoCs 1-gen-2014 Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Loi, I; Conti, F. - IEEE
A stream buffer mechanism for pervasive splitting transformations on polyhedral process networks 1-gen-2014 Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Loi, I; Conti, F. ACM INTERNATIONAL CONFERENCE PROCEEDINGS SERIES ACM Digital Library
The multi-dataflow composer tool: generation of on-the-fly reconfigurable platforms 1-gen-2014 Palumbo, Francesca; Carta, N; Pani, Danilo; Meloni, Paolo; Raffo, Luigi JOURNAL OF REAL-TIME IMAGE PROCESSING -
A runtime adaptive H.264 video-decoding MPSoC platform 1-gen-2013 Tuveri, Giuseppe; Secchi, S; Meloni, Paolo; Raffo, Luigi; Cannella, E. - IEEE
A low overhead self-adaptation technique for KPN applications on NoC-based MPSoCs 1-gen-2013 Derin, O; Ramankutty, P; Meloni, Paolo; Tuveri, Giuseppe - IEEE
Mostrati risultati da 1 a 50 di 78
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