Francesca Palumbo
A multithread AES accelerator for Cyber-Physical Systems
2023-01-01 Ratto, Francesco; Raffo, Luigi; Palumbo, Francesca
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators
2023-01-01 Ratto, F.; Mainez, A. P.; Sau, C.; Meloni, P.; Deriu, G.; Delucchi, S.; Massa, M.; Raffo, L.; Palumbo, F.
Multithread Accelerators on FPGAs: A Dataflow-Based Approach
2022-01-01 Ratto, F.; Esposito, S.; Sau, C.; Raffo, L.; Palumbo, F.
PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCs
2021-01-01 Rubattu, Claudio; Palumbo, Francesca; Bhattacharyya, Shuvra; Pelcat, Maxime
Unmanned vehicles in smart farming: A survey and a glance at future horizons
2021-01-01 Madronal, D.; Palumbo, F.; Capotondi, A.; Marongiu, A.
PathTracing: Raising the level of understanding of processing latency in heterogeneous MPSoCs
2021-01-01 Rubattu, C.; Palumbo, F.; Bhattacharyya, S.; Pelcat, M.
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project
2021-01-01 Sau, C.; Rinaldi, C.; Pomante, L.; Palumbo, F.; Valente, G.; Fanni, T.; Martinez, M.; van der Linden, F.; Basten, T.; Geilen, M.; Peeren, G.; Kadlec, J.; Jaaskelainen, P.; Bulej, L.; Barranco, F.; Saarinen, J.; Santti, T.; Zedda, M. K.; Sanchez, V.; Nikkhah, S. T.; Goswami, D.; Amat, G.; Marsik, L.; van Helvoort, M.; Medina, L.; Al-Ars, Z.; de Beer, A.
In-Field Automatic Detection of Grape Bunches under a Totally Uncontrolled Environment
2021-01-01 Ghiani, Luca; Sassu, Alberto; Palumbo, Francesca; Mercenaro, Luca; Gambella, Filippo
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design
2021-01-01 Sau, C.; Fanni, T.; Rubattu, C.; Raffo, L.; Palumbo, F.
A Composable Monitoring System for Heterogeneous Embedded Platforms
2021-01-01 Valente, G.; Fanni, T.; Sau, C.; Mascio, T. D.; Pomante, L.; Palumbo, F.
Feasibility study and porting of the damped least square algorithm on FPGA
2020-01-01 Sau, C.; Fanni, T.; Rubattu, C.; Fanni, L.; Raffo, L.; Palumbo, F.
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project
2020-01-01 Pomante, Luigi; Palumbo, Francesca; Rinaldi, Claudia; Valente, Giacomo; Sau, Carlo; Fanni, Tiziana; Linden, Frank van der; Basten, Twan; Geilen, Marc; Peeren, Geran; Kadlec, Jiri; Jaaskelainen, Pekka; Martinez, Marcos; Saarinen, Jukka; Santti, Tero; Zedda, Maria Katiuscia; Sanchez, Victor; Goswami, Dip; Al-Ars, Zaid; Beer, Ad de
NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning
2020-01-01 Nasser, Y.; Sau, C.; Prevotet, J. -C.; Fanni, T.; Palumbo, F.; Helard, M.; Raffo, L.
A Dataflow Implementation of Inverse Kinematics on Reconfigurable Heterogeneous MPSoC
2019-01-01 Fanni, Luca; Suriano, Leonardo; Rubattu, Claudio; Sanchez, Pablo; de la Torre, Eduardo; Palumbo, Francesca
Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI
2019-01-01 Fanni, Tiziana; Madroñal, Daniel; Rubattu, Claudio; Sau, Carlo; Palumbo, Francesca; Juárez, Eduardo; Pelcat, Maxime; Sanz, Cesar; Raffo, Luigi
Reconfigurable and approximate computing for video coding
2019-01-01 Palumbo, Francesca; Sau, Carlo
An integrated hardware/software design methodology for signal processing systems
2019-01-01 Li, L.; Sau, C.; Fanni, T.; Li, J.; Viitanen, T.; Christophe, F.; Palumbo, F.; Raffo, L.; Huttunen, H.; Takala, J.; Bhattacharyya, S. S.
Neu Pow: Artificial Neural Networks for Power and Behavioral Modeling of Arithmetic Components in 45nm ASICs Technology
2019-01-01 Nasser, Y.; Sau, C.; Prevotet, J. -C.; Fanni, T.; Palumbo, F.; Helard, M.; Raffo, L.
Elicitation of technical requirements in large research projects: The CERBERO approach
2019-01-01 Masin, M.; Palumbo, F.; Adriaanse, J.; Myrhaug, H.; Regazzoni, F.; Sanchez, M.; Zedda, K.
Dataflow-functional high-level synthesis for coarse-grained reconfigurable accelerators
2019-01-01 Rubattu, Claudio; Palumbo, Francesca; Sau, Carlo; Salvador, Ruben; Serot, Jocelyn; Desnos, Karol; Raffo, Luigi; Pelcat, Maxime
Optimization and deployment of CNNs at the Edge: The ALOHA experience
2019-01-01 Meloni, P.; Loi, D.; Busia, P.; Deriu, G.; Pimentel, A. D.; Sapra, D.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Pintor, M.; Biggio, B.; Moser, B.; Shepelev, N.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F.
Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding
2019-01-01 Sau, C.; Ligas, D.; Fanni, T.; Raffo, L.; Palumbo, F.
ALOHA: An architectural-aware framework for deep learning at the edge
2018-01-01 Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, Maura; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F.
Dataflow modeling for reconfigurable signal processing systems
2018-01-01 Desnos, K.; Palumbo, F.
Adaptive software-augmented hardware reconfiguration with dataflow design automation
2018-01-01 Rubattu, Claudio; Palumbo, Francesca; Pelcat, Maxime
Multi-Grain Reconfiguration for Advanced Adaptivity in Cyber-Physical Systems
2018-01-01 Fanni, T; Rodriguez, A; Sau, C; Suriano, L; Palumbo, F; Raffo, L; de la Torre, E
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project
2018-01-01 Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintor, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I.
An FPGA platform for real-time simulation of spiking neuronal networks
2017-01-01 Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs
2017-01-01 Meloni, P.; Rubattu, C.; Tuveri, G.; Pani, D.; Raffo, L.; Palumbo, F.
Exploring the performance of partially reconfigurable point-to-point interconnects
2017-01-01 Abdali, El Mehdi; Pelcat, Maxime; Berry, Francois; Diguet, Jean-philippe; Palumbo, Francesca
Message from the Program Chairs
2017-01-01 Becchi, M.; Palumbo, F.
Cross-layer design of reconfigurable cyber-physical systems
2017-01-01 Masin, M.; Palumbo, Francesca; Myrhaug, H.; de Oliveira Filho, J. A.; Pastena, M.; Pelcat, M.; Raffo, L.; Regazzoni, F.; Sanchez, A. A.; Toffetti, A.; de la Torre, E.; Zedda, K.
Hardware design methodology using lightweight dataflow and its integration with low power techniques
2017-01-01 Fanni, Tiziana; Li, L; Viitanen, T; Sau, Carlo; Xie, R; Palumbo, F; Raffo, L; Huttunen, H; Takala, J; Bhattacharyya, Ss
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing
2017-01-01 Sau, Carlo; Palumbo, Francesca; Pelcat, M; Heulot, J; Nogues, E; Menard, D; Meloni, Paolo; Raffo, Luigi
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy
2017-01-01 Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo
Power and clock gating modelling in coarse grained reconfigurable systems
2016-01-01 Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca
Automated Design Flow for Multi-Functional Dataflow-Based Platforms
2016-01-01 Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca; Bezati, E; Casale Brunet, S; Mattavelli, M.
Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC
2016-01-01 Palumbo, Francesca; Sau, Carlo; Evangelista, Davide; Meloni, Paolo; Pelcat, Maxime; Raffo, Luigi
On-the-fly adaptivity for process networks over shared-memory platforms
2016-01-01 Tuveri, Giuseppe; Meloni, Paolo; Palumbo, Francesca; Pietro Seu, Giovanni; Loi, Igor; Conti, Francesco; Raffo, Luigi
SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract
2016-01-01 Palumbo, Francesca; Sau, Carlo; Fanni, Tiziana; Meloni, Paolo; Raffo, Luigi
Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design
2016-01-01 Sau, Carlo; Carta, N; Raffo, Luigi; Palumbo, Francesca
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation
2016-01-01 Meloni, Paolo; Palumbo, Francesca; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi
Demo: Reconfigurable Platform Composer Tool
2016-01-01 Sau, C.; Fanni, T.; Meloni, P.; Raffo, L.; Pelcat, M.; Palumbo, F.
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures
2016-01-01 Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi
Adaptable AES implementation with power-gating support
2016-01-01 Banik, Subhadeep; Bogdanov, Andrey; Fanni, Tiziana; Sau, Carlo; Raffo, Luigi; Palumbo, Francesca; Regazzoni, Francesco
Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain
2016-01-01 Sau, Carlo; Fanni, L; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca
Power modelling for saving strategies in coarse grained reconfigurable systems
2015-01-01 Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca
Automated power gating methodology for dataflow-based reconfigurable systems
2015-01-01 Fanni, Tiziana; Sau, Carlo; Raffo, Luigi; Palumbo, Francesca
Coarse-grained reconfiguration: dataflow-based power management
2015-01-01 Palumbo, Francesca; Sau, Carlo; Raffo, Luigi
Computing swarms for self-adaptiveness and self-organizationin floating-point array processing
2015-01-01 Pani, Danilo; Sau, Carlo; Palumbo, F; Raffo, Luigi
Title | Issue Date | Author(s) | Journal | Publisher |
---|---|---|---|---|
A multithread AES accelerator for Cyber-Physical Systems | 1-Jan-2023 | Ratto, Francesco; Raffo, Luigi; Palumbo, Francesca | - | The Association for Computing Machinery |
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators | 1-Jan-2023 | Ratto, F.; Mainez, A. P.; Sau, C.; Meloni, P.; Deriu, G.; Delucchi, S.; Massa, M.; Raffo, L.; Palumbo, F. | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY | - |
Multithread Accelerators on FPGAs: A Dataflow-Based Approach | 1-Jan-2022 | Ratto, F.; Esposito, S.; Sau, C.; Raffo, L.; Palumbo, F. | - | - |
PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCs | 1-Jan-2021 | Rubattu, Claudio; Palumbo, Francesca; Bhattacharyya, Shuvra; Pelcat, Maxime | ACM TRANSACTIONS ON MODELING AND PERFORMANCE EVALUATION OF COMPUTING SYSTEMS | - |
Unmanned vehicles in smart farming: A survey and a glance at future horizons | 1-Jan-2021 | Madronal, D.; Palumbo, F.; Capotondi, A.; Marongiu, A. | - | - |
PathTracing: Raising the level of understanding of processing latency in heterogeneous MPSoCs | 1-Jan-2021 | Rubattu, C.; Palumbo, F.; Bhattacharyya, S.; Pelcat, M. | - | - |
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project | 1-Jan-2021 | Sau, C.; Rinaldi, C.; Pomante, L.; Palumbo, F.; Valente, G.; Fanni, T.; Martinez, M.; van der Linden, F.; Basten, T.; Geilen, M.; Peeren, G.; Kadlec, J.; Jaaskelainen, P.; Bulej, L.; Barranco, F.; Saarinen, J.; Santti, T.; Zedda, M. K.; Sanchez, V.; Nikkhah, S. T.; Goswami, D.; Amat, G.; Marsik, L.; van Helvoort, M.; Medina, L.; Al-Ars, Z.; de Beer, A. | MICROPROCESSORS AND MICROSYSTEMS | - |
In-Field Automatic Detection of Grape Bunches under a Totally Uncontrolled Environment | 1-Jan-2021 | Ghiani, Luca; Sassu, Alberto; Palumbo, Francesca; Mercenaro, Luca; Gambella, Filippo | SENSORS | - |
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design | 1-Jan-2021 | Sau, C.; Fanni, T.; Rubattu, C.; Raffo, L.; Palumbo, F. | MICROPROCESSORS AND MICROSYSTEMS | - |
A Composable Monitoring System for Heterogeneous Embedded Platforms | 1-Jan-2021 | Valente, G.; Fanni, T.; Sau, C.; Mascio, T. D.; Pomante, L.; Palumbo, F. | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS | - |
Feasibility study and porting of the damped least square algorithm on FPGA | 1-Jan-2020 | Sau, C.; Fanni, T.; Rubattu, C.; Fanni, L.; Raffo, L.; Palumbo, F. | IEEE ACCESS | - |
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project | 1-Jan-2020 | Pomante, Luigi; Palumbo, Francesca; Rinaldi, Claudia; Valente, Giacomo; Sau, Carlo; Fanni, Tiziana; Linden, Frank van der; Basten, Twan; Geilen, Marc; Peeren, Geran; Kadlec, Jiri; Jaaskelainen, Pekka; Martinez, Marcos; Saarinen, Jukka; Santti, Tero; Zedda, Maria Katiuscia; Sanchez, Victor; Goswami, Dip; Al-Ars, Zaid; Beer, Ad de | - | - |
NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning | 1-Jan-2020 | Nasser, Y.; Sau, C.; Prevotet, J. -C.; Fanni, T.; Palumbo, F.; Helard, M.; Raffo, L. | ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS | - |
A Dataflow Implementation of Inverse Kinematics on Reconfigurable Heterogeneous MPSoC | 1-Jan-2019 | Fanni, Luca; Suriano, Leonardo; Rubattu, Claudio; Sanchez, Pablo; de la Torre, Eduardo; Palumbo, Francesca | - | CEUR-WS.org |
Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI | 1-Jan-2019 | Fanni, Tiziana; Madroñal, Daniel; Rubattu, Claudio; Sau, Carlo; Palumbo, Francesca; Juárez, Eduardo; Pelcat, Maxime; Sanz, Cesar; Raffo, Luigi | - | - |
Reconfigurable and approximate computing for video coding | 1-Jan-2019 | Palumbo, Francesca; Sau, Carlo | - | IET |
An integrated hardware/software design methodology for signal processing systems | 1-Jan-2019 | Li, L.; Sau, C.; Fanni, T.; Li, J.; Viitanen, T.; Christophe, F.; Palumbo, F.; Raffo, L.; Huttunen, H.; Takala, J.; Bhattacharyya, S. S. | JOURNAL OF SYSTEMS ARCHITECTURE | - |
Neu Pow: Artificial Neural Networks for Power and Behavioral Modeling of Arithmetic Components in 45nm ASICs Technology | 1-Jan-2019 | Nasser, Y.; Sau, C.; Prevotet, J. -C.; Fanni, T.; Palumbo, F.; Helard, M.; Raffo, L. | - | Association for Computing Machinery, Inc |
Elicitation of technical requirements in large research projects: The CERBERO approach | 1-Jan-2019 | Masin, M.; Palumbo, F.; Adriaanse, J.; Myrhaug, H.; Regazzoni, F.; Sanchez, M.; Zedda, K. | - | Association for Computing Machinery |
Dataflow-functional high-level synthesis for coarse-grained reconfigurable accelerators | 1-Jan-2019 | Rubattu, Claudio; Palumbo, Francesca; Sau, Carlo; Salvador, Ruben; Serot, Jocelyn; Desnos, Karol; Raffo, Luigi; Pelcat, Maxime | IEEE EMBEDDED SYSTEMS LETTERS | - |
Optimization and deployment of CNNs at the Edge: The ALOHA experience | 1-Jan-2019 | Meloni, P.; Loi, D.; Busia, P.; Deriu, G.; Pimentel, A. D.; Sapra, D.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Pintor, M.; Biggio, B.; Moser, B.; Shepelev, N.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. | - | Association for Computing Machinery, Inc |
Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding | 1-Jan-2019 | Sau, C.; Ligas, D.; Fanni, T.; Raffo, L.; Palumbo, F. | IEEE ACCESS | - |
ALOHA: An architectural-aware framework for deep learning at the edge | 1-Jan-2018 | Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, Maura; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. | - | Association for Computing Machinery |
Dataflow modeling for reconfigurable signal processing systems | 1-Jan-2018 | Desnos, K.; Palumbo, F. | - | Springer International Publishing |
Adaptive software-augmented hardware reconfiguration with dataflow design automation | 1-Jan-2018 | Rubattu, Claudio; Palumbo, Francesca; Pelcat, Maxime | - | Institute of Electrical and Electronics Engineers Inc. |
Multi-Grain Reconfiguration for Advanced Adaptivity in Cyber-Physical Systems | 1-Jan-2018 | Fanni, T; Rodriguez, A; Sau, C; Suriano, L; Palumbo, F; Raffo, L; de la Torre, E | - | IEEE |
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project | 1-Jan-2018 | Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintor, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I. | - | Institute of Electrical and Electronics Engineers Inc. |
An FPGA platform for real-time simulation of spiking neuronal networks | 1-Jan-2017 | Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi | FRONTIERS IN NEUROSCIENCE | - |
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs | 1-Jan-2017 | Meloni, P.; Rubattu, C.; Tuveri, G.; Pani, D.; Raffo, L.; Palumbo, F. | JOURNAL OF SYSTEMS ARCHITECTURE | - |
Exploring the performance of partially reconfigurable point-to-point interconnects | 1-Jan-2017 | Abdali, El Mehdi; Pelcat, Maxime; Berry, Francois; Diguet, Jean-philippe; Palumbo, Francesca | - | Institute of Electrical and Electronics Engineers Inc. |
Message from the Program Chairs | 1-Jan-2017 | Becchi, M.; Palumbo, F. | - | Association for Computing Machinery, Inc |
Cross-layer design of reconfigurable cyber-physical systems | 1-Jan-2017 | Masin, M.; Palumbo, Francesca; Myrhaug, H.; de Oliveira Filho, J. A.; Pastena, M.; Pelcat, M.; Raffo, L.; Regazzoni, F.; Sanchez, A. A.; Toffetti, A.; de la Torre, E.; Zedda, K. | - | - |
Hardware design methodology using lightweight dataflow and its integration with low power techniques | 1-Jan-2017 | Fanni, Tiziana; Li, L; Viitanen, T; Sau, Carlo; Xie, R; Palumbo, F; Raffo, L; Huttunen, H; Takala, J; Bhattacharyya, Ss | JOURNAL OF SYSTEMS ARCHITECTURE | - |
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing | 1-Jan-2017 | Sau, Carlo; Palumbo, Francesca; Pelcat, M; Heulot, J; Nogues, E; Menard, D; Meloni, Paolo; Raffo, Luigi | IEEE EMBEDDED SYSTEMS LETTERS | - |
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy | 1-Jan-2017 | Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY | - |
Power and clock gating modelling in coarse grained reconfigurable systems | 1-Jan-2016 | Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca | - | ACM |
Automated Design Flow for Multi-Functional Dataflow-Based Platforms | 1-Jan-2016 | Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca; Bezati, E; Casale Brunet, S; Mattavelli, M. | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY | - |
Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC | 1-Jan-2016 | Palumbo, Francesca; Sau, Carlo; Evangelista, Davide; Meloni, Paolo; Pelcat, Maxime; Raffo, Luigi | - | Elsevier B.V. |
On-the-fly adaptivity for process networks over shared-memory platforms | 1-Jan-2016 | Tuveri, Giuseppe; Meloni, Paolo; Palumbo, Francesca; Pietro Seu, Giovanni; Loi, Igor; Conti, Francesco; Raffo, Luigi | MICROPROCESSORS AND MICROSYSTEMS | - |
SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract | 1-Jan-2016 | Palumbo, Francesca; Sau, Carlo; Fanni, Tiziana; Meloni, Paolo; Raffo, Luigi | - | Institute of Electrical and Electronics Engineers Inc. |
Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design | 1-Jan-2016 | Sau, Carlo; Carta, N; Raffo, Luigi; Palumbo, Francesca | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY | - |
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation | 1-Jan-2016 | Meloni, Paolo; Palumbo, Francesca; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi | MICROPROCESSORS AND MICROSYSTEMS | - |
Demo: Reconfigurable Platform Composer Tool | 1-Jan-2016 | Sau, C.; Fanni, T.; Meloni, P.; Raffo, L.; Pelcat, M.; Palumbo, F. | - | IEEE Computer Society |
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures | 1-Jan-2016 | Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi | JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING | - |
Adaptable AES implementation with power-gating support | 1-Jan-2016 | Banik, Subhadeep; Bogdanov, Andrey; Fanni, Tiziana; Sau, Carlo; Raffo, Luigi; Palumbo, Francesca; Regazzoni, Francesco | - | Association for Computing Machinery, Inc |
Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain | 1-Jan-2016 | Sau, Carlo; Fanni, L; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca | - | IEEE |
Power modelling for saving strategies in coarse grained reconfigurable systems | 1-Jan-2015 | Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca | - | IEEE (Institute of Electrical and Electronics Engineers) |
Automated power gating methodology for dataflow-based reconfigurable systems | 1-Jan-2015 | Fanni, Tiziana; Sau, Carlo; Raffo, Luigi; Palumbo, Francesca | - | Association for Computing Machinery |
Coarse-grained reconfiguration: dataflow-based power management | 1-Jan-2015 | Palumbo, Francesca; Sau, Carlo; Raffo, Luigi | IET COMPUTERS & DIGITAL TECHNIQUES | - |
Computing swarms for self-adaptiveness and self-organizationin floating-point array processing | 1-Jan-2015 | Pani, Danilo; Sau, Carlo; Palumbo, F; Raffo, Luigi | ACM TRANSACTIONS ON AUTONOMOUS AND ADAPTIVE SYSTEMS | - |
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