Exploring NEURAghe: A Customizable Template for APSoC-Based CNN Inference at the Edge

Meloni P.;Loi D.;Deriu G.;Carreras M.;
2020-01-01

Abstract

The NEURAghe architecture has proved to be a powerful accelerator for deep convolutional neural networks running on heterogeneous architectures based on Xilinx Zynq-7000 all programmable system-on-chips. NEURAghe exploits the processing system and the programmable logic available in these devices to improve performance through parallelism, and to widen the scope of use-cases that can be supported. In this letter, we extend the NEURAghe template-based architecture to guarantee design-time scalability to multiprocessor SoCs with vastly different cost, size, and power envelope, such as Xilinx's Z-7007s, Z-7020, and Z-7045. The proposed architecture achieves state-of-the-art performance and cost effectiveness in all the analyzed configurations, reaching up to 335 GOps/s on the Z-7045.
2020
Accelerator architectures; Field programmable gate arrays; Neural networks; Parallel architectures; Reconfigurable architectures
Files in This Item:
File Size Format  
Exploring_NEURAghe_A_Customizable_Template_for_APSoC-Based_CNN_Inference_at_the_Edge.pdf

Solo gestori archivio

Type: versione editoriale
Size 1.19 MB
Format Adobe PDF
1.19 MB Adobe PDF & nbsp; View / Open   Request a copy

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

Questionnaire and social

Share on:
Impostazioni cookie