Algorithms for the synchrophasor measurement in steady-state and dynamic conditions

CASTELLO, PAOLO

2014-03-31

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Abstract

Phasor measurement units (PMUs) are becoming one of the key issues of power network monitoring. They have to be able to perform accurate estimations of current and voltage signals either under steady-state or dynamic conditions. The first part of this PhD thesis analyses the impact of the phasor models on the estimation accuracy, focuses on algorithms proposed in the literature for the estimation of phasors and studies their performance under several different conditions. On the basis of the results of this analysis, in the second part of this thesis an innovative approach to improve the performance of synchrophasor estimation is presented. The method proposes a modified version of the synchrophasor estimation algorithm which uses the non-orthogonal transform defined as Taylor-Fourier Transform (TFT) and which is based on a Weighted Least Squares (WLS) estimation of the parameters of a second order Taylor model of the phasor. The aim of the proposed enhancements is to improve the performance of the algorithm in presence of fast transient events and to achieve a Phasor Measurement Unit that is simultaneously compliant with both M and P compliance classes, suggested by the synchrophasor standard IEEE C37.118.1. In particular, while the TFT based adaptive algorithm is used for synchrophasor estimation, frequency and Rate of Change of Frequency (ROCOF) are estimated using the higher derivatives outputs of the adaptive TFT. Frequency estimation feedback is used to tune the algorithm and achieve better performance in off-nominal conditions. The proposed approaches are validated by means of simulations in all the static and dynamic conditions defined in the standard. In the last chapter, the algorithm proposed above is used in a novel architecture, compliant to IEC 61850, for a distributed IED-based PMU, to be used in electrical substations. In particular, a measurement architecture based on process bus and sampled values synchronized with IEEE 1588-2008 is proposed, so that voltage and current signals are acquired by a Merging Unit device, while the PMU signal processing is performed on a IED (Intelligent Electronic Device), in compliance with IEEE C37.118.1-2011.